Controllable ovonic phase-change semiconductor memory device and methods of fabricating the same
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United States of America Patent
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Jul 23, 2002
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N/A
app pub date -
Sep 25, 2001
filing date -
Oct 2, 1996
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Abstract
An ovonic phase-change semiconductor memory device having a reduced area of contact between electrodes of chalcogenide memories, and methods of forming the same. Such memory devices are formed by forming a tip protruding from a lower surface of a lower electrode element An insulative material is applied over the lower electrode such that an upper surface of the tip is exposed. A chalcogenide material and an upper electrode are either formed atop the tip, or the tip is etched into the insulative material and the chalcogenide material and upper electrode are deposited within the recess. This allows the memory cells to be made smaller and allows the overall power requirements for the memory cell to be minimized.
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