Base cell and two-dimensional array of base cells for programmable logic LSI
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United States of America Patent
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Jul 23, 2002
Grant Date -
N/A
app pub date -
Oct 28, 1999
filing date -
Oct 30, 1998
priority date (Note) -
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Abstract
A programmable logic LSI resolves a problem leaving some wiring resource extra upon realizing one circuit (some wiring cells are not used) and leaving some logical resource extra upon realizing another circuit (some logical cell are not used, and can realize both functions of logical resource and wiring resource with a single base cell. The base call for a programmable logic LSI which is formed by connecting a plurality of the base cells, includes a combined programmable circuit realizing a programmable logic circuit function and a programmable wiring circuit function, and a mode setting circuit for selectively making one of the programmable logic circuit function and the programmable wiring circuit function according to a mode information. Upon functioning as the programmable logic circuit, logical operation is performed with respect to an input signal input to the base cell to feed an output signal. On the other hand, upon functioning as programmable wiring circuit, a plurality of bi-directional connection lines connected to the base cell are connected with each other.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| NEC CORPORATION | TOKYO 108-8001 |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Fujii, Taro | Tokyo, JP | 37 | 360 |
| Furuta, Koichiro | Tokyo, JP | 35 | 372 |
| Motomura, Masato | Tokyo, JP | 47 | 1176 |
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| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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