Multiprocessor operation in a multimedia signal processor
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United States of America Patent
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Jul 23, 2002
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N/A
app pub date -
Oct 10, 2000
filing date -
Aug 19, 1996
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Abstract
To achieve high performance at low cost, an integrated digital signal processor uses an architecture which includes both a general purpose processor and a vector processor. The integrated digital signal processor also includes a cache subsystem, a first bus and a second bus. The cache subsystem provides caching and data routing for the processors and buses. Multiple simultaneous communication paths can be used in the cache subsystem for the processors and buses. Furthermore, simultaneous reads and writes are supported to a cache memory in the cache subsystem.
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