Method and arrangement for memory management
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United States of America Patent
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Jul 23, 2002
Grant Date -
N/A
app pub date -
Oct 5, 1999
filing date -
Oct 5, 1998
priority date (Note) -
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Abstract
The present invention relates to a method and an arrangement for memory management, where a first memory 3 and a second memory 4 works in parallel, such as two memories belonging to a first 1 and a second 2 parallel working processor. Respective memory 3, 4 can be accessed for read and/or write instructions through a memory-bus 13, 24, in time slots correlated to instruction cycles of the execution work of the processors 3, 4. The second memory is to hold the same information as the first memory. The memory management comprises detecting free time slots on the memory-bus, and the management is only performed in such detected free time slots.
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