High level automatic core configuration
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United States of America Patent
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Jul 23, 2002
Grant Date -
N/A
app pub date -
Jul 23, 1999
filing date -
Jul 23, 1999
priority date (Note) -
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status (Latency Note)
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Abstract
A system and method for interconnecting a plurality of cores into a single functional core. The method involves creating for each core a pin configuration structure based on a set of configuration rules. When the cores to be interconnected are selected, the pin configuration structure is accessed by the configurator program tool of the present invention. The configurator program tool then connects the cores together using the pin configuration structure and configuration rules for the selected cores. The configurator program tool generates an error-free high level model of the interconnected cores. The configurator program tool allows configuration flexibility and is general enough to handle most configuration scenarios. The tool is also easy to code, extensible, and can be applied to existing core designs with no modification of the cores themselves.
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