Methods, arbiters, and computer program products that can improve the performance of a pipelined dual bus data processing system

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United States of America Patent

PATENT NO 6430641
SERIAL NO

09304939

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Abstract

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Methods, arbiters, and computer program products determine if a request for an idle bus in a dual bus data processing system is being blocked by one or more pending requests for the other bus. In this circumstance, any such pending request for the other bus is masked by the arbiter so that the request for the idle bus can be granted. Consequently, a more efficient utilization of the dual bus architecture is achieved. In an illustrative embodiment, a bus request is received for a first one of the dual busses. If the address and control busses are unavailable to allow the request to be granted, then an inquiry is made regarding the status of a pending request for the second one of the dual busses that has gained control of the address and control busses. In particular, it is determined whether a primary request has been granted and a secondary request has been pipelined for the second one of the dual busses. If a primary request has been granted and a secondary request has been pipelined, then the priority of the pending requests for the second one of the dual busses are examined. If the priority of the pending requests for the second one of the dual busses are at least as high as the currently pending request for the first one of the dual busses, then these requests are masked so that they no longer appears to be pending, which allows the request for the first one of the dual busses to be granted.

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Patent Owner(s)

Patent OwnerAddress
LENOVO INTERNATIONAL LIMITED23/F LINCOLN HOUSE TAIKOO PLACE 979 KING'S ROAD QUARRY BAY

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hofmann, Richard Gerard Cary, NC 69 1029
LaFauci, Peter Dean Holly Springs, NC 9 164
Wilkerson, Dennis Charles Durham, NC 9 216

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