Process for fabricating an integrated circuit device having a capacitor with an electrode formed at a high aspect ratio
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United States of America Patent
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Aug 13, 2002
Grant Date -
N/A
app pub date -
Oct 4, 1999
filing date -
Oct 5, 1998
priority date (Note) -
Expired
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Abstract
Fine etching of ruthenium or ruthenium oxide is suited for a ferroelectric and high dielectric film such as BST. Over a silicon oxide film 46 and a plug 49, a titanium nitride film 50, ruthenium film 51, ruthenium dioxide film 52 and silicon oxide film 53 are stacked successively. After patterning the silicon oxide film 53 with a resist film, the resist film is removed. In the presence of the patterned silicon oxide film 53, the ruthenium dioxide film 52 and ruthenium film 51 are etched under processing pressure of 15 mTorr, plasma source power of 500 W, RF bias power of 200 W, oxygen flow of 715 sccm, chlorine flow of 80 sccm, total flow of about 800 sccm, gas residence time of 49.3 msec, and over etching of 100%.
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