Method of system circuit design and circuitry for high speed data communication
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United States of America Patent
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Aug 13, 2002
Grant Date -
N/A
app pub date -
Sep 5, 2001
filing date -
Sep 5, 2001
priority date (Note) -
Expired
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Abstract
A method of designing a system of electronic circuit is presented. With this method the circuit parameters of the components of the individual functional building blocks of the system are systematically adjusted to minimize the deteriorating effect resulting from system-level interactions among these functional building blocks. In one embodiment, the method is applied to a CMOS IC that is a Divide-by-16 divider where the functional building blocks are four Dividing by-2 dividers. The resulting improvement of output signal ripple from each devided stage is graphically presented. In another embodyment, the method is applied to another CMOS IC that is a Bang Bang Phase Detector where the functional building blocks are three Master Slave D-Type Flip Flops. The resulting improvement of output signal ripple is also graphically presented.
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