Programmable clock generator
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 13, 2002
Issued Date -
N/A
app pub date -
Mar 26, 1998
filing date -
Oct 30, 1995
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A programmable circuit for generating a clock signal is disclosed. The present invention provides a clock generator architecture that combines PLL-based clock generator circuitry with an on-chip EPROM in a monolithic clock generator chip. The clock generator allows for electrical configuration of various information including PLL parameters, input thresholds, output drive levels and output frequencies. The various parameters can be configured after the clock generator is fabricated. The parameters can be configured either during wafer sort or after packaging. The clock generator can be erased prior to packaging so programming can be verified.
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