Memory device operable with a small-capacity buffer memory and having a flash memory
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United States of America Patent
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Aug 13, 2002
Grant Date -
Jun 27, 2002
app pub date -
Sep 14, 1999
filing date -
Apr 5, 1999
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
The 2 lower bits of a medium sector address that the memory device receives from the host system are used as the data corresponding to a column address in a sector in the flash memory. For instance, with the flash memory having the sector capacity of 2048 bytes and the memory device having the sector capacity of 512 bytes, data transfer control portion when the respective 2 lower bits, 00, 01, 10, and 11 are input, starts the data transfer to the flash memory from the buffer memory at a timing corresponding to column addresses 0h, 200h, 400h, and 600h, respectively.
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