Method for achieving copper fill of high aspect ratio interconnect features

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6436267
SERIAL NO

09650108

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

One aspect of the invention provides a consistent metal electroplating technique to form void-less metal interconnects in sub-micron high aspect ratio features on semiconductor substrates. One embodiment of the invention provides a method for filling sub-micron features on a substrate, comprising reactive precleaning the substrate, depositing a barrier layer on the substrate using high density plasma physical vapor deposition; depositing a seed layer over the barrier layer using high density plasma physical vapor deposition; and electro-chemically depositing a metal using a highly resistive electrolyte and applying a first current density during a first deposition period followed by a second current density during a second period.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
APPLIED MATERIALS INC3050 BOWERS AVENUE SANTA CLARA CA 95054

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Carl, Daniel A Pleasanton, CA 29 918
Chen, Liang San Jose, CA 931 8928
Cheung, Robin Cupertino, CA 71 3148
Chin, Barry Saratoga, CA 33 1311
Ding, Peijun San Jose, CA 132 3424
Dordi, Yezdi Palo Alto, CA 117 2819
Hashim, Imran San Jose, CA 125 2920
Hey, Peter Sunnyvale, CA 12 840
Sinha, Ashok K Palo Alto, CA 56 4714

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation