Integrated circuit device providing isolation between adjacent regions
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United States of America Patent
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-
Aug 20, 2002
Grant Date -
Sep 20, 2001
app pub date -
May 22, 2001
filing date -
Mar 3, 2000
priority date (Note) -
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status (Latency Note)
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Abstract
A fabrication method for providing isolation between adjacent regions of an integrated circuit includes providing a guard layer over field edges that are the interfaces between field oxide regions and diffusion regions in which dopant is introduced. The guard layer will inhibit introduction of dopant along the field-edge, so that a substantially dopant-free transition strip is formed. The transition strip inhibits current leakage from the active region to the field oxide region. In one embodiment, the active region is an active area diode, such as used to form an Active Pixel Sensor (APS) pixel. The guard layer is biased so as to further inhibit current leakage during circuit operation. In another embodiment, the method is used in the fabrication of transistors for APS pixels having an overlay photodiode structure.
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