Adjustable I/O timing from externally applied voltage

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6438043
APP PUB NO 20020004892A1
SERIAL NO

09145720

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An integrated circuit, including but not limited to a memory device, receives an externally provided voltage signal and selectively adjusts the timing of internal control signals. An external signal selects between two possible pre-determined delay paths. The delay paths are adjusted using fuse circuitry which can be programmed by the manufacturer prior to implementation by a user. The delay path adjustment feature is particularly applicable to adjusting output signal timing to allow the integrated circuit to be operated in an environment which requires slower communications speeds. The same integrated circuit, therefore, can also be implemented in an environment which allows for faster communications speeds.

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Patent Owner(s)

Patent OwnerAddress
U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT633 WEST FIFTH STREET 24TH FLOOR LOS ANGELES CA 90071

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gans, Dean Boise, ID 58 872
Pawlowski, Joseph Thomas Boise, ID 40 207
Stave, Eric J Boise, ID 50 221

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