Method and apparatus for reducing power consumption in a digital processing system
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United States of America Patent
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Aug 20, 2002
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N/A
app pub date -
Sep 30, 1999
filing date -
Sep 30, 1999
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Abstract
Methods and apparatuses for controlling power consumption in a digital processing system. In one aspect of the invention, an exemplary method includes using a non-volatile memory of the digital processing system (DPS) as a virtual memory of a volatile random access memory (RAM) of the DPS, determining a selection of a reduced power consumption state, storing, in response to the selection and through a virtual memory process, data from the volatile RAM to the non-volatile memory, and reducing power to at least one element of the data processing system after the storing, wherein the storing includes determining whether to store the data to the non-volatile memory by determining if first data previously stored as virtual memory in the non-volatile memory is valid (not dirty) after the selection.
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