Method for constructing a wafer interposer by using conductive columns

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United States of America Patent

PATENT NO 6440771
SERIAL NO

09816516

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Abstract

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The present invention provides a method and apparatus for testing wafers that is simple and allows testing prior to dicing so that the need to temporarily package individual dies for testing is eliminated. As a result, the number of manufacturing steps is reduced, thus increasing first pass yields. In addition, manufacturing time is decreased, thereby improving cycle times and avoiding additional costs. The invention also provides for packaging of the die at the completion of testing. One form of the present invention provides an interposer substrate connected to a wafer through conductive columns.

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Patent Owner(s)

Patent OwnerAddress
MICRO-ASI INC12655 NORTH CENTRAL EXPRESSWAY SUITE 1000 DALLAS TX 75243

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Pierce, John L Dallas, TX 10 219

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