Method and apparatus for layout-constrained global routing

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United States of America Patent

PATENT NO 6442745
SERIAL NO

09474712

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Abstract

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A global router uses an algorithm for controlling routing based upon rough topologies. In one embodiment a set of regions and layers is specified over which the routing must occur. Tunnels can be defined outside of which routing cannot occur. Topologies of previous iterations are considered. Restrictions on the amount of deviation between successive iterations can be specified. As a result, successive iterations of the global router do not cause large changes in the timing delays of circuits. In addition, partial tunnels can be stretched to accommodate nearby nets. Also described are an integrated circuit that is produced using the layout-constrained global routing algorithm and a computer-readable medium storing computer-executable instructions and at least one data structure for implementing the algorithm.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Arunachalam, Prakash S Portland, OR 5 91
Chan, Heming Beaverton, OR 1 75

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