Semiconductor module
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United States of America Patent
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-
Sep 3, 2002
Grant Date -
N/A
app pub date -
Feb 4, 2000
filing date -
Feb 5, 1999
priority date (Note) -
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status (Latency Note)
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Abstract
A plurality of MOS transistors are arranged on the top surface of a conductor substrate which is a drain electrode. The drain contact of each MOS transistor is connected to the conductor substrate. The source contact of each MOS transistor is connected to the output conductor path which is a source electrode through a bonding wire. The gate contact of each MOS transistor is connected to a drive signal conductor path which is a gate electrode through a bonding wire. The source contacts of the MOS transistors are interconnected through a bridge electrode and a bonding wire.
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