Methods and apparatus for generating spatially resolved voltage contrast maps of semiconductor test structures
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United States of America Patent
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Sep 3, 2002
Grant Date -
N/A
app pub date -
Aug 25, 2000
filing date -
Dec 14, 1999
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Abstract
Disclosed is a method of inspecting a sample. The sample is illuminated with an incident beam, thereby causing voltage contrast within structures present on the sample. Voltage contrast is detected within the structures. Information from the detected voltage contrast is stored, and position data concerning the location of features corresponding to at least a portion of the stored voltage contrast information is also stored. In a specific embodiment, the features represent electrical defects present on the sample. In another embodiment, the stored position data is in the form of a two dimensional map. In another aspect, the sample is re-inspected and the stored position data is used in analyzing data resulting from the re-inspection.
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