Capacitively coupled references for isolated analog-to-digital converter systems
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United States of America Patent
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Sep 3, 2002
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N/A
app pub date -
Apr 16, 2001
filing date -
Apr 16, 2001
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Abstract
The present invention provides an alternative to Prior Art isolation techniques by providing a capacitively coupled reference voltage and a capacitively coupled gain calibration. The isolation technique of the present invention is based upon the idea of a near unity gain capacitive divider. If the load or parasitic capacitance is Cload and the isolation capacitance is Ciso, then the gain between input and output can be calculated as Vout/Vin=(Ciso)/(Ciso+Cload), which will be nearly unity (i.e., 1) when Ciso>>Cload. In addition, if Ciso>>Cload, the gain will also be largely insensitive to variations in Ciso and Cload. For example, if Cin is 100 ppm of Ciso, then a 10% variation in Ciso or Cload results in only a 10 ppm variation in the voltage gain.
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