Importance

Loading Importance Indicators...

Abstract

The present invention adds capabilities to a Hardware Verification Language (HVL) which facilitate the generation of random test data. Sources of random numbers are easily produced by simply adding a randomness attribute to a variable declaration of a class definition. Such variables are called random variables. A 'randomize' method call may be made to an instance of the class definition to produce random values for each random variable. The values assigned to random variables are controlled using constraint blocks, which are part of the class definition. A constraint block is comprised of constraint expressions, where each constraint expression limits the values that can be assigned to a random variable on the left-hand-side (lhs) of the constraint expression. Because random variables may also appear on the right-hand-side (rhs) of a constraint expression there is an ordering in which random variable values must be assigned and this dependency is expressed by directed acyclic graphs (DAGs). A linear ordering for assigning values to the random variables is derived from the DAGs. The constraint expressions constraining each random variable are converted into ranges of permissible values from which a value is chosen at random.

Loading the Abstract Image...

First Claim