Double comparison successive approximation method and apparatus

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United States of America Patent

PATENT NO 6452528
SERIAL NO

09360294

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Abstract

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A double comparison successive approximation A/D converter. The converter compares the value with upper and lower limits. The bit values are not set unless the value is distant from the compared value. Otherwise, the value of the bit is held until later when the bit does fall outside the limits.

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Patent Owner(s)

Patent OwnerAddress
MICRON TECHNOLOGY INC8000 SOUTH FEDERAL WAY BOISE ID 83707

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mansoorian, Barmak Pasadena, CA 28 506

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