2T dual-port DRAM in a pure logic process with non-destructive read capability
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United States of America Patent
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Sep 17, 2002
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N/A
app pub date -
Feb 13, 2001
filing date -
Feb 13, 2001
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Abstract
A 2T dual-port dynamic random access memory (DRAM) that can be fabricated using a pure logic process. Write/Refresh port is independent for any DRAM cell of the DRAM. Sense amplifier is built into each DRAM cell.
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