Optimizing computer performance by using data compression principles to minimize a loss function

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United States of America Patent

PATENT NO 6453389
SERIAL NO

09340279

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Abstract

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The method of prefetching data into cache to minimize CPU stall time uses a rough predictor to make rough predictions about what cache lines will be needed next by the CPU. The address difference generator uses the rough prediction and the actual cache miss address to determine the address difference. The prefetch engine builds a data structure to represent address differences and weights them according to the accumulated stall time produced by the cache misses given that the corresponding address is not prefetched. This stall time is modeled as a loss function of the form: ##EQU1## The weights in the data structure change as the prefetch engine learns more information. The prefetch engine's goal is to predict the cache line needed and prefetch before the CPU requests it.

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Patent Owner(s)

Patent OwnerAddress
HEWLETT-PACKARD DEVELOPMENT COMPANY L P10300 ENERGY DRIVE SPRING TX 77389

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ferrandiz, Joesp M Palo Alto, CA 1 112
Gupta, Rajiv Los Altos, CA 137 4840
Merhav, Neri Haifa, IL 8 380
Rokicki, Tomas G Palo Alto, CA 4 395
Seroussi, Gadiel Cupertino, CA 92 2348
Weinberger, Marcelo San Jose, CA 44 1009

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