Importance

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Abstract

In an implantable medical device, a frequency synthesizer employed in the RF transceiver of the IMD operating system functions in a PLL LOCK mode wherein the VCO frequency is governed by the PLL and an energy saving HOLD mode wherein the PLL is not operational and the VCO generated carrier frequency can drift over time. The PLL circuit is powered up and coupled with a control voltage input and the output of the VCO to develop a frequency control voltage stored by a capacitive loop filter during initial LOCK portions of both uplink and downlink telemetry transmission time periods. A frequency modulation (FM) input of the VCO receives data bit modulation voltages that modulates the carrier frequency during uplink transmission of patient data. During the HOLD portion of a downlink telemetry transmission, an AFC algorithm is enabled and derives a frequency correction value from the difference in frequency of the constant received carrier frequency and the drifting VCO generated carrier frequency, and the frequency correction value is applied to the VCO FM input to compensate for loop filter capacitor discharge of the control voltage causing the drift. The AFC algorithm derived frequency correction value is stored in memory and is also applied during the HOLD portion of an uplink telemetry transmission to the VCO FM input to compensate for loop filter capacitor discharge of the control voltage causing the drift. In addition, a recharge current is applied to the capacitive loop filter.

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