Method and apparatus for synchronizing dynamic random access memory exiting from a low power state
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United States of America Patent
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Sep 24, 2002
Grant Date -
N/A
app pub date -
Dec 13, 1999
filing date -
Dec 13, 1999
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method and apparatus for exiting a dynamic random access memory from a low power state is provided. The exit from the low power state is first initiated. After the expiration of an exit delay period, a quiet time command is routed through a queue circuit. In one embodiment the use of a bypass circuit allows the interruption of the memory pipeline with a subsequent restart of the pipeline without excessive delay. A flexible clock is delayed by the onset of the quiet time command until the subsequent quiet time event.
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