Nonvolatile semiconductor memory device
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United States of America Patent
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-
Oct 1, 2002
Grant Date -
Jan 24, 2002
app pub date -
Sep 14, 2001
filing date -
Feb 8, 1999
priority date (Note) -
Expired
status (Latency Note)
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Abstract
With a local self boost (LSB) technique, the distribution, of threshold voltages after data erase is set toward a higher side and the distribution width is narrowed sufficiently within the range in which cell erase states can be read. To this end, block write is carried out on a memory cell array. Next, setting a predetermined voltage as a start voltage, soft erase is carried out for each block. After carrying out erase verification read, the threshold voltages of the cells are compared with a determination reference value. As a result of this comparison, if the threshold voltages of the cells do not reach the determination reference value, soft erase is repeated. In that case, the predetermined voltage during the soft erase is changed from the start voltage. When the threshold voltages of all the cells have reached the determination reference value, the soft erase is ended.
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