Method and apparatus for port vector determination at egress
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United States of America Patent
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Oct 1, 2002
Grant Date -
N/A
app pub date -
May 21, 1999
filing date -
May 21, 1999
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Abstract
An integrated multiport switch operating in a packet switched network provides the capability to alter VLAN tags on a port by port basis. An internal rules checker (IRC) employs a modular architecture that enables data frames to be processed simultaneously and increase data throughput. The IRC further generates a port vector, and thereby, outputs a forwarding descriptor that instructs Port Vector FIFO logic (PVF) on how to process the data frame.
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