Pipeline operation method and pipeline operation device to interlock the translation of instructions based on the operation of a non-pipeline operation unit
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United States of America Patent
Stats
-
Oct 1, 2002
Issued Date -
N/A
app pub date -
Oct 21, 1997
filing date -
Sep 19, 1994
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A pipeline operation method and a pipeline operation device in which an operation result of an operation unit can be effectively written to a register. In the pipeline operation method and the pipeline operation device, a pipeline operation unit that can perform a pipeline operation, a non-pipeline operation unit that cannot perform a pipeline operation, and a register that is shared by the pipeline operation unit and the non-pipeline operation unit are arranged. To perform an operation while an operation result of each of the pipeline units is being written into the register, translating an instruction to the pipeline operation unit is interlocked when the writing of the operation result of the pipeline operation unit overlaps with the writing of the operation result of the non-pipeline operation unit. The pipeline operation method and the pipeline operation device are applicable to a computing system where plural operation units including pipeline operation units and non-pipeline operation units share one writing port to perform an arithmetic operation.
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