Stereolithographic method and apparatus for fabricating spacers for semiconductor devices and resulting structures

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6461881
SERIAL NO

09589848

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Insulative spacers to be disposed on an active surface of a semiconductor device component and methods of fabricating and disposing the insulative spacers on semiconductor device components. Semiconductor device components including the insulative spacers are also disclosed, as well as assemblies wherein the insulative spacers are disposed between a semiconductor device component and a higher level substrate. One or more of the insulative spacers are disposed on the active surface of a semiconductor device prior to bonding the same to a higher level substrate. Upon assembly of the semiconductor device component face down upon a higher level substrate and joining conductive structures, such as solder structures, between the contact pads of the semiconductor device component and corresponding contact pads of the higher level substrate, the insulative spacers define a minimum, substantially uniform distance between the semiconductor device component and the higher level substrate. The insulative spacers also prevent tilting or tipping of the semiconductor device component relative to the higher level substrate. The insulative spacers may be preformed structures which are attached to an active surface of a semiconductor device component. Alternatively, the insulative spacers can be fabricated on the active surface of the semiconductor device component. A stereolithographic method of fabricating the insulative spacers is disclosed. The stereolithographic method may include use of a machine vision system including at least one camera operably associated with a computer controlling a stereolithographic application of material so that the system may recognize the position and orientation of a substrate to which the material is to be applied.

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Patent Owner(s)

Patent OwnerAddress
U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT100 WALL STREET SUITE 1600 NEW YORK NY 10005

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Farnworth, Warren M Nampa, ID 855 33798
Wood, Alan G Boise, ID 415 23368

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