Flip-chip with matched lines and ground plane
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United States of America Patent
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Oct 8, 2002
Grant Date -
N/A
app pub date -
Aug 31, 2000
filing date -
Aug 31, 2000
priority date (Note) -
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Abstract
A method and apparatus for substantially reducing the need for capacitive and inductive compensation for signal lines on a flip-chip semiconductor device. A flip-chip semiconductor device is disclosed having signal lines of substantially equal length. At least one ground plane is also disposed on the flip-chip device and separated from the signal lines by a dielectric layer. By using a ground plane and signal lines having substantially equal lengths, impedance caused by electromagnetic and electromagnetic coupling is significantly reduced, and impedance from signal line length is balanced such that the load on each of the signal lines, as viewed by the semiconductor die, are substantially equal.
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