Dynamic optimizing object code translator for architecture emulation and dynamic optimizing object code translation method

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 6463582
SERIAL NO

09176112

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Abstract

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An optimizing object code translation system and method perform dynamic compilation and translation of a target object code on a source operating system while performing optimization. Compilation and optimization of the target code is dynamically executed in real time. A compiler performs analysis and optimizations that improve emulation relative to template-based translation and interpretation such that a host processor which processes larger order instructions, such as 32-bit instructions, may emulate a target processor which processes smaller order instructions, such as 16-bit and 8-bit instructions. The optimizing object code translator does not require knowledge of a static program flow graph or memory locations of target instructions prior to run time. In addition, the optimizing object code translator does not require knowledge of the location of all join points into the target object code prior to execution. During program execution, a translator records branch operations. The logging of information identifies instructions and instruction join points. When a number of times a branch operation is executed exceeds a threshold, the destination of the branch becomes a seed for compilation and code portions between seeds are defined as segments. A segment may be incomplete allowing for modification or replacement to account for a new flow of program control during real time program execution.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
FUJITSU LIMITEDKAWASAKI18047

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bank, III Joseph A New York, NY 1 469
Garrett, Charles D Seattle, WA 47 2390
Lethin, Richard A New York, NY 25 655
Sakurai, Mitsuo Kawasaki, JP 17 700
Wada, Mikayo Kawasaki, JP 2 597

Cited Art Landscape

Patent Info (Count) # Cites Year
 
APPLE INC. (1)
5751982 Software emulation system with dynamic translation of emulated instructions for increased processing speed 104 1995
 
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (2)
* 6115809 Compiling strong and weak branching behavior instruction blocks to separate caches for dynamic and static prediction 86 1998
* 6158047 Client/server system for fast, user transparent and memory efficient computer language translation 23 1998
 
MICROSOFT TECHNOLOGY LICENSING, LLC (1)
* 5761477 Methods for safe and efficient implementations of virtual machines 176 1995
* Cited By Examiner

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Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (9)
* 2003/0233,386 High speed virtual machine and compiler 9 2003
* 2004/0194,071 Compiling device, computer-readable recording medium on which a compiling program is recorded and a compiling method 7 2004
* 2010/0201,102 Pin-engaging drawbar and lock plate assembly 2 2010
* 2013/0132,061 JUST-IN-TIME STATIC TRANSLATION SYSTEM FOR EMULATED COMPUTING ENVIRONMENTS 1 2011
9823924 Vector element rotate and insert under mask instruction 0 2013
9824021 Address translation structures to provide separate translations for instruction fetches and data accesses 0 2014
9824022 Address translation structures to provide separate translations for instruction fetches and data accesses 0 2014
9823926 Vector element rotate and insert under mask instruction 0 2014
* 2015/0095,602 Creating A Program Product Or System For Executing A Perform Frame Management Instruction 0 2014
 
CITIBANK, N.A. (2)
* 2008/0288,915 Determining destinations of a dynamic branch 5 2003
* 2009/0094,015 COMPUTER EMULATOR EMPLOYING DIRECT EXECUTION OF COMPILED FUNCTIONS 3 2008
 
TYPEMOCK LTD. (1)
* 9396097 Methods, circuits, devices, systems and associated computer executable code for testing software code 1 2014
 
PANASONIC CORPORATION (3)
7958499 Program execution control device, program execution control method, control program, and recording medium 4 2004
* 2007/0226,714 PROGRAM EXECUTION CONTROL DEVICE, PROGRAM EXECUTION CONTROL METHOD, CONTROL PROGRAM, AND RECORDING MEDIUM 22 2004
* 2007/0277,162 Compiler apparatus, compiler method, and compiler program 24 2007
 
ADVANCED SILICON TECHNOLOGIES, LLC (21)
7275246 Executing programs for a first computer architecture on a computer of a second architecture 46 1999
* 6941545 Profiling of computer programs executing in virtual memory systems 82 1999
7137110 Profiling ranges of execution of a computer program 37 1999
6978462 Profiling execution of a sequence of events occuring during a profiled execution interval that matches time-independent selection criteria of events to be profiled 56 1999
7013456 Profiling execution of computer programs 112 1999
* 6826748 Profiling program execution into registers of a computer 45 1999
6763452 Modifying program execution based on profiling 79 1999
6954923 Recording classification of instructions executed by a computer 113 1999
8074055 Altering data storage conventions of a processor when execution flows from first architecture code to second architecture code 25 1999
7111290 Profiling program execution to identify frequently-executed portions and to assist binary translation 63 1999
6779107 Computer execution by opportunistic adaptation 34 1999
6789181 Safety net paradigm for managing two computer execution modes 34 1999
7254806 Detecting reordered side-effects 67 1999
7047394 Computer for execution of RISC and CISC instruction sets 119 2000
6934832 Exception mechanism for a computer 66 2000
7228404 Managing instruction side-effects 36 2000
8121828 Detecting conditions for transfer of execution from one computer instruction stream to another and executing transfer on satisfaction of the conditions 22 2004
8065504 Using on-chip and off-chip look-up tables indexed by instruction address to control instruction execution in a processor 25 2004
8127121 Apparatus for executing programs for a first computer architechture on a computer of a second architechture 46 2007
7941647 Computer for executing two instruction sets and adds a macroinstruction end marker for performing iterations after loop termination 10 2007
8788792 Apparatus for executing programs for a first computer architecture on a computer of a second architecture 5 2012
 
SAMSUNG ELECTRONICS CO., LTD. (1)
* 2010/0174,853 USER DEVICE INCLUDING FLASH AND RANDOM WRITE CACHE AND METHOD WRITING DATA 70 2009
 
HITACHI, LTD. (3)
* 2001/0044,931 Compile method suitable for speculation mechanism 6 2001
* 7617087 Memory management method for dynamic conversion type emulator 0 2004
* 2005/0160,407 Memory management method for dynamic conversion type emulator 2 2004
 
ORACLE AMERICA, INC. (10)
6738969 Non-intrusive gathering of code usage information to facilitate removing unused compiled code 4 2002
* 6775810 Boosting simulation performance by dynamically customizing segmented object codes based on stimulus coverage 4 2002
* 2004/0068,701 Boosting simulation performance by dynamically customizing segmented object codes based on stimulus coverage 3 2002
* 7603664 System and method for marking software code 18 2002
* 2004/0078,785 System and method for marking software code 24 2002
* 7318222 Methods for execution control acquistion of a program and for executing an optimized version of a program 12 2003
* 2005/0050,530 Methods for execution control acquisition of a program and for executing an optimized version of a program 1 2003
* 7770152 Method and apparatus for coordinating state and execution context of interpreted languages 5 2005
* 7873952 Code transformation to optimize fragments that implement constant loading 6 2006
* 2007/0226,717 Code transformation to optimize fragments that implement constant loading 8 2006
 
ETHICON ENDO-SURGERY, INC. (1)
* 2011/0071,557 SYMMETRICAL DRIVE SYSTEM FOR AN IMPLANTABLE RESTRICTION DEVICE 2 2009
 
MYRIAD GROUP AG (5)
* 7080366 Dynamic compiler and method of compiling code to generate dominant path and to handle exceptions 53 2001
* 7058929 Direct invocation of methods using class loader 27 2001
* 6691303 Method and system of testing and verifying computer code in a multi-threaded environment 8 2001
* 2002/0112,227 Dynamic compiler and method of compiling code to generate dominant path and to handle exceptions 24 2001
* 2002/0049,865 Direct invocation of methods using class loader 9 2001
 
ORACLE INTERNATIONAL CORPORATION (2)
* 6857119 Techniques for modifying a compiled application 34 2001
* 2017/0131,983 COMPILER OPTIMIZED DATA MODEL EVALUATION 0 2015
 
NXP B.V. (2)
* 2005/0097,531 Method of compiling a source code program into a machine-readable target object program in a network environment 1 2004
* 2005/0246,571 Method for processing instructions 0 2005
 
APPLE INC. (4)
* 7694289 Method for embedding object codes in source codes 2 2005
* 9256410 Failure profiling for continued code optimization 1 2012
9027006 Value profiling for code optimization 2 2012
* 2014/0047,416 Failure Profiling for Continued Code Optimization 1 2012
 
ATI INTERNATIONAL SRL, A SOCIETY WITH RESTRICTED LIABILITY ORGANIZED UNDER THE LAWS OF BARBADOS (1)
7065633 System for delivering exception raised in first architecture to operating system coded in second architecture in dual architecture CPU 77 2000
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (366)
* 7665079 Program execution method using an optimizing just-in-time compiler 6 2000
* 7409680 Program code conversion for a register-based program code 0 2001
* 7203933 Program code conversion 11 2001
* 2004/0205,733 Program code conversion 2 2001
* 6813764 Compiler generation of instruction sequences for unresolved storage references 9 2001
* 2002/0166,113 Compiler generation of instruction sequences for unresolved storage references 9 2001
* 7207035 Apparatus and method for converting an instruction and data trace to an executable program 10 2001
* 2003/0101,436 Apparatus and method for converting an instruction and data trace to an executable program 3 2001
7421686 Program code conversion 3 2002
7356810 Program code conversion for program code referring to variable size registers 2 2002
* 7346900 Register-based program code conversion 0 2002
* 7328431 Program code conversion for a register-based program code 1 2002
* 7210133 Program code conversion 6 2002
* 7203934 Program code conversion 26 2002
* 2003/0126,588 Program code conversion 0 2002
* 2003/0106,050 Program code conversion 0 2002
* 2003/0088,859 Program code conversion 0 2002
* 7926032 Two meta-level modeling approach for mapping typed data 1 2002
* 2004/0015,515 Two meta-level modeling approach for mapping typed data 22 2002
* 7210126 Using identifiers and counters for controlled optimization compilation 7 2002
* 2003/0079,214 Using identifiers and counters for controled optimization compilation 4 2002
9043194 Method and system for efficient emulation of multiprocessor memory consistency 0 2002
* 8108843 Hybrid mechanism for more efficient emulation and method therefor 6 2002
7953588 Method and system for efficient emulation of multiprocessor address translation on a multiprocessor host 5 2002
7496494 Method and system for multiprocessor emulation on a multiprocessor host system 5 2002
7146607 Method and system for transparent dynamic optimization in a multiprocessing environment 51 2002
* 2004/0078,186 Method and system for efficient emulation of multiprocessor memory consistency 35 2002
* 2004/0054,518 Method and system for efficient emulation of multiprocessor address translation on a multiprocessor host 20 2002
* 2004/0054,992 Method and system for transparent dynamic optimization in a multiprocessing environment 25 2002
* 2004/0054,993 Hybrid mechanism for more efficient emulation and method therefor 7 2002
* 2004/0054,517 Method and system for multiprocessor emulation on a multiprocessor host system 34 2002
7331040 Condition code flag emulation for program code conversion 8 2003
* 2004/0158,822 Condition code flag emulation for program code conversion 20 2003
* 7546591 Program conversion and data processor 0 2003
* 2004/0030,423 Program conversion and data processor 1 2003
* 2006/0037,005 Method and apparatus for increasing computer security 0 2004
7913239 Method and apparatus for a programming framework for pattern matching and transformation of intermediate language expression trees 0 2005
8301870 Method and apparatus for fast synchronization and out-of-order execution of instructions in a meta-program based computing system 1 2006
* 2008/0028,196 Method and apparatus for fast synchronization and out-of-order execution of instructions in a meta-program based computing system 18 2006
* 7934208 Method for transparent on-line dynamic binary optimization 1 2006
* 2008/0092,128 Method for transparent on-line dynamic binary optimization 18 2006
7725736 Message digest instruction 5 2006
8799581 Cache coherence monitoring and feedback 2 2007
8671248 Architecture support of memory access coloring 1 2007
* 2008/0168,239 ARCHITECTURE SUPPORT OF MEMORY ACCESS COLORING 3 2007
* 2008/0168,237 CACHE COHERENCE MONITORING AND FEEDBACK 1 2007
8037461 Program code conversion 0 2007
8006237 Program code conversion 3 2007
* 2007/0250,824 Program code conversion 1 2007
* 8146065 Running time of short running applications by effectively interleaving compilation with computation in a just-in-time environment 0 2007
* 2009/0049,432 METHOD AND APPARATUS TO IMPROVE THE RUNNING TIME OF SHORT RUNNING APPLICATIONS BY EFFECTIVELY INTERLEAVING COMPILATION WITH COMPUTATION IN A JUST-IN-TIME ENVIRONMENT 6 2007
* 7991962 System and method of using threads and thread-local storage 1 2007
8024555 Condition code flag emulation for program code conversion 0 2007
* 2008/0177,985 CONDITION CODE FLAG EMULATION FOR PROGRAM CODE CONVERSION 23 2007
8677098 Dynamic address translation with fetch protection 0 2008
8417916 Perform frame management function instruction for setting storage keys and clearing blocks of main storage 11 2008
8335906 Perform frame management function instruction for clearing blocks of main storage 9 2008
8230199 Perform frame management function instruction for setting storage keys and clearing blocks of main storage 0 2008
8151083 Dynamic address translation with frame management 11 2008
8117417 Dynamic address translation with change record override 12 2008
8103851 Dynamic address translation with translation table entry format control for indentifying format of the translation table entry 27 2008
8082405 Dynamic address translation with fetch protection 4 2008
8041922 Enhanced dynamic address translation with load real address function 4 2008
8041923 Load page table entry address instruction execution based on an address translation format control field 10 2008
8037278 Dynamic address translation with format control 12 2008
8019964 Dynamic address translation with DAT protection 6 2008
* 7739434 Performing a configuration virtual topology change and instruction therefore 15 2008
* 2009/0193,214 DYNAMIC ADDRESS TRANSLATION WITH FRAME MANAGEMENT 35 2008
* 2009/0187,732 DYNAMIC ADDRESS TRANSLATION WITH DAT PROTECTION 53 2008
* 2009/0187,724 DYNAMIC ADDRESS TRANSLATION WITH FRAME MANAGEMENT 45 2008
* 2009/0182,966 DYNAMIC ADDRESS TRANSLATION WITH FRAME MANAGEMENT 74 2008
* 2009/0182,975 DYNAMIC ADDRESS TRANSLATION WITH LOAD PAGE TABLE ENTRY ADDRESS 38 2008
* 2009/0182,915 Performing a Configuration Virtual Topology Change and Instruction Therefore 26 2008
* 2009/0182,964 DYNAMIC ADDRESS TRANSLATION WITH FORMAT CONTROL 47 2008
* 2009/0182,971 DYNAMIC ADDRESS TRANSLATION WITH FETCH PROTECTION 38 2008
8086811 Optimizations of a perform frame management function issued by pageable guests 14 2008
* 2009/0216,984 OPTIMIZATIONS OF A PERFORM FRAME MANAGEMENT FUNCTION ISSUED BY PAGEABLE GUESTS 15 2008
8095773 Dynamic address translation with translation exception qualifier 0 2008
* 2009/0216,992 DYNAMIC ADDRESS TRANSLATION WITH TRANSLATION EXCEPTION QUALIFIER 42 2008
8176279 Managing use of storage by multiple pageable guests of a computing environment 12 2008
8176280 Use of test protection instruction in computing environments that support pageable guests 8 2008
* 2009/0228,262 USE OF TEST PROTECTION INSTRUCTION IN COMPUTING ENVIRONMENTS THAT SUPPORT PAGEABLE GUESTS 12 2008
* 2009/0217,098 MANAGING USE OF STORAGE BY MULTIPLE PAGEABLE GUESTS OF A COMPUTING ENVIRONMENT 47 2008
* 8291397 Compiler optimized function variants for use when return codes are ignored 1 2008
* 2009/0254,893 COMPILER OPTIMIZED FUNCTION VARIANTS FOR USE WHEN RETURN CODES ARE IGNORED 6 2008
* 8407681 System and method for changing variables at runtime 1 2008
* 2009/0293,050 SYSTEM AND METHOD FOR CHANGING VARIABLES AT RUNTIME 1 2008
7844446 Method and system for multiprocessor emulation on a multiprocessor host system 1 2009
* 2009/0157,377 METHOD AND SYSTEM FOR MULTIPROCESSOR EMULATION ON A MULTIPROCESSOR HOST SYSTEM 0 2009
8650240 Complex matrix multiplication operations with data pre-conditioning in a high performance computing architecture 2 2009
8577950 Matrix multiplication operations with data pre-conditioning in a high performance computing architecture 0 2009
* 2011/0040,821 Matrix Multiplication Operations with Data Pre-Conditioning in a High Performance Computing Architecture 7 2009
8949106 Just in time compiler in spatially aware emulation of a guest computer instruction set 0 2009
8447583 Self initialized host cell spatially aware emulation of a computer instruction set 3 2009
8428930 Page mapped spatially aware emulation of a computer instruction set 11 2009
8301434 Host cell spatially aware emulation of a guest wild branch 10 2009
* 2011/0071,816 Just In Time Compiler in Spatially Aware Emulation of a Guest Computer Instruction Set 11 2009
8015335 Performing a configuration virtual topology change and instruction therefore 2 2009
8930635 Page invalidation processing with setting of storage key to predefined value 2 2009
8918601 Deferred page clearing in a multiprocessor computer system 1 2009
8510511 Reducing interprocessor communications pursuant to updating of a storage key 1 2009
* 2011/0145,510 REDUCING INTERPROCESSOR COMMUNICATIONS PURSUANT TO UPDATING OF A STORAGE KEY 13 2009
* 2011/0145,511 PAGE INVALIDATION PROCESSING WITH SETTING OF STORAGE KEY TO PREDEFINED VALUE 25 2009
8806179 Non-quiescing key setting facility 0 2009
* 2011/0145,550 NON-QUIESCING KEY SETTING FACILITY 3 2009
8516230 SPE software instruction cache 1 2009
8850166 Load pair disjoint facility and instruction therefore 9 2010
8438340 Executing atomic store disjoint instructions 3 2010
* 2011/0202,748 LOAD PAIR DISJOINT FACILITY AND INSTRUCTION THEREFORE 18 2010
7984275 Computer configuration virtual topology discovery and instruction therefore 15 2010
* 2010/0223,448 Computer Configuration Virtual Topology Discovery and Instruction Therefore 11 2010
8914619 High-word facility for extending the number of general purpose registers available to instructions 3 2010
9342352 Guest access to address spaces of adapter 0 2010
9213661 Enable/disable adapters of a computing environment 0 2010
9195623 Multiple address spaces per adapter with address translation 0 2010
8918573 Input/output (I/O) expansion response processing in a peripheral component interconnect express (PCIe) environment 3 2010
8745292 System and method for routing I/O expansion requests and responses in a PCIE architecture 5 2010
8683108 Connected input/output hub management 0 2010
8650335 Measurement facility for adapter functions 3 2010
8650337 Runtime determination of translation formats for adapter functions 0 2010
8645606 Upbound input/output expansion request and response processing in a PCIe architecture 3 2010
8645767 Scalable I/O adapter function level error detection, isolation, and reporting 1 2010
8639858 Resizing address spaces concurrent to accessing the address spaces 2 2010
8635430 Translation of input/output addresses to memory addresses 0 2010
8626970 Controlling access by a configuration to an adapter function 0 2010
8621112 Discovery by operating system of information relating to adapter functions accessible to the operating system 2 2010
8615622 Non-standard I/O adapters in a standardized I/O architecture 3 2010
8615645 Controlling the selectively setting of operational parameters for an adapter 5 2010
8572635 Converting a message signaled interruption into an I/O adapter event notification 1 2010
8566480 Load instruction for communicating with adapters 0 2010
8549182 Store/store block instructions for communicating with adapters 0 2010
8510599 Managing processing associated with hardware events 4 2010
8504754 Identification of types of sources of adapter interruptions 8 2010
8505032 Operating system notification of actions to be taken responsive to adapter events 12 2010
8489793 Connected input/output hub management 0 2010
8478922 Controlling a rate at which adapter interruption requests are processed 4 2010
8468284 Converting a message signaled interruption into an I/O adapter event notification to a guest operating system 1 2010
8595469 Diagnose instruction for serializing processing 3 2010
8407701 Facilitating quiesce operations within a logically partitioned computer system 4 2010
9459851 Arranging binary code based on call graph partitioning 0 2010
8631225 Dynamically rewriting branch instructions to directly target an instruction cache location 2 2010
8522225 Rewriting branch instructions using branch stubs 4 2010
* 7984083 Garbage collector with eager read barrier 17 2010
9600281 Matrix multiplication operations using pair-wise load and splat operations 0 2010
* 9495136 Using aliasing information for dynamic binary optimization 0 2011
* 2012/0198,428 Using Aliasing Information for Dynamic Binary Optimization 3 2011
8719548 Method and system for efficient emulation of multiprocessor address translation on a multiprocessor 0 2011
* 2011/0191,095 METHOD AND SYSTEM FOR EFFICIENT EMULATION OF MULTIPROCESSOR ADDRESS TRANSLATION ON A MULTIPROCESSOR 0 2011
8533714 Dynamic virtual machine domain configuration and virtual machine relocation management 3 2011
9323668 Deconfigure storage class memory command 0 2011
9116634 Configure storage class memory command 5 2011
9116788 Using extended asynchronous data mover indirect data address words 5 2011
9116789 Chaining move specification blocks 6 2011
9058243 Releasing blocks of storage class memory 5 2011
9058275 Data returned responsive to executing a start subchannel instruction 5 2011
9037907 Operator message commands for testing a coupling facility 0 2011
9021179 Store storage class memory information command 5 2011
9021180 Clearing blocks of storage class memory 5 2011
9021226 Moving blocks of data between main memory and storage class memory 5 2011
8918797 Processing operator message commands 0 2011
8799522 Executing a start operator message command 2 2011
8689240 Transmitting operator message commands to a coupling facility 1 2011
8560737 Managing operator message buffers in a coupling facility 0 2011
8832689 Emulating execution of an instruction for discovering virtual topology of a logical partitioned computer system 0 2011
8549094 Facilitating communication between isolated memory spaces of a communications environment 0 2011
8301815 Executing an instruction for performing a configuration virtual topology change 7 2011
* 8639911 Load page table entry address instruction execution based on an address translation format control field 0 2011
* 2012/0011,341 Load Page Table Entry Address Instruction Execution Based on an Address Translation Format Control Field 19 2011
8364912 Use of test protection instruction in computing environments that support pageable guests 12 2011
8239649 Clearing guest frames absent paging-in to host main storage 7 2011
* 8806452 Transformation of computer programs and eliminating errors 2 2011
* 2013/0125,098 Transformation of Computer Programs 3 2011
8683176 Dynamic address translation with translation exception qualifier 0 2011
8578351 Hybrid mechanism for more efficient emulation and method therefor 0 2011
* 8621180 Dynamic address translation with translation table entry format control for identifying format of the translation table entry 5 2011
* 2012/0137,106 Dynamic Address Translation With Translation Table Entry Format Control for Identifying Format of the Translation Table Entry 19 2011
9335993 Convert from zoned format to decimal floating point format 0 2011
9329861 Convert to zoned format from decimal floating point format 0 2011
* 8631216 Dynamic address translation with change record override 5 2012
* 2012/0144,153 Dynamic Address Translation With Change Record Override 4 2012
9110878 Use of a warning track interruption facility by a program 0 2012
9104508 Providing by one program to another program access to a warning track facility 0 2012
8850450 Warning track interruption facility 1 2012
8392898 Running time of short running applications by effectively interleaving compilation with computation in a just-in-time environment 2 2012
8489853 Executing a perform frame management instruction 8 2012
9715383 Vector find element equal instruction 0 2012
9710266 Instruction to compute the distance to a specified memory boundary 0 2012
9588762 Vector find element not equal instruction 0 2012
9459864 Vector string range compare 0 2012
9459867 Instruction to load data up to a specified memory boundary indicated by the instruction 0 2012
9459868 Instruction to load data up to a dynamically determined memory boundary 0 2012
9454366 Copying character data having a termination character from one memory location to another 0 2012
9454367 Finding the length of a set of character data having a termination character 0 2012
9389856 Copying character data having a termination character from one memory location to another 0 2012
9389857 Finding the length of a set of character data having a termination character 0 2012
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9323523 Finding the length of a set of character data having a termination character 0 2012
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9286065 Finding the length of a set of character data having a termination character 0 2012
9280347 Transforming non-contiguous instruction specifiers to contiguous instruction specifiers 1 2012
9268566 Character data match determination by loading registers at most up to memory block boundary and comparing 0 2012
8713548 Rewriting branch instructions using branch stubs 0 2012
8627051 Dynamically rewriting branch instructions to directly target an instruction cache location 0 2012
9600253 Arranging binary code based on call graph partitioning 0 2012
8782381 Dynamically rewriting branch instructions in response to cache line eviction 1 2012
8458387 Converting a message signaled interruption into an I/O adapter event notification to a guest operating system 1 2012
8521964 Reducing interprocessor communications pursuant to updating of a storage key 1 2012
9304916 Page invalidation processing with setting of storage key to predefined value 0 2012
8751775 Non-quiescing key setting facility 0 2012
8607032 Diagnose instruction for serializing processing 1 2012
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8700959 Scalable I/O adapter function level error detection, isolation, and reporting 0 2012
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9164882 Chaining move specification blocks 5 2012
9122573 Using extended asynchronous data mover indirect data address words 5 2012
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8887002 Transactional execution branch indications 3 2013
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8909899 Emulating execution of a perform frame management instruction 4 2013
9619230 Predictive fetching and decoding for selected instructions 0 2013
9348596 Forming instruction groups based on decode time instruction optimization 2 2013
8707000 Execution of a perform frame management function instruction 2 2013
8930673 Load page table entry address instruction execution based on an address translation format control field 1 2013
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9632780 Diagnose instruction for serializing processing 0 2013
9134911 Store peripheral component interconnect (PCI) function controls instruction 0 2013
8972670 Use of test protection instruction in computing environments that support pageable guests 2 2013
9244856 Dynamic address translation with translation table entry format control for identifying format of the translation table entry 0 2013
9372640 Configure storage class memory command 0 2013
8935504 Execution of a perform frame management function instruction 6 2013
9003134 Emulation of a dynamic address translation with change record override on a machine of another architecture 0 2013
9021225 Dynamic address translation with fetch protection in an emulated environment 0 2013
9092351 Creating a dynamic address translation with translation exception qualifier 1 2014
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9411588 Conditional transaction end instruction 0 2014
9588774 Common boot sequence for control utility able to be initialized in multiple architectures 0 2014
9582295 Architectural mode configuration 0 2014
9542204 Architectural mode configuration 0 2014
9734083 Separate memory address translations for instruction fetches and data accesses 0 2014
9720661 Selectively controlling use of extended mode features 0 2014
9715449 Hierarchical translation structures providing separate translations for instruction fetches and data accesses 0 2014
9569115 Transparent code patching 0 2014
9483295 Transparent dynamic code optimization 2 2014
9256546 Transparent code patching including updating of address translation structures 1 2014
9098478 Warning track interruption facility 0 2014
9122540 Transformation of computer programs and eliminating errors 0 2014
* 9792157 Execution of an instruction for performing a configuration virtual topology change 0 2014
9137120 Emulating execution of an instruction for discovering virtual topology of a logical partitioned computer system 0 2014
9785352 Transparent code patching 0 2014
9734084 Separate memory address translations for instruction fetches and data accesses 0 2014
9720662 Selectively controlling use of extended mode features 0 2014
9710382 Hierarchical translation structures providing separate translations for instruction fetches and data accesses 0 2014
9489229 Transparent dynamic code optimization 1 2014
9244854 Transparent code patching including updating of address translation structures 0 2014
9252953 Instruction for performing a pseudorandom number generate operation 1 2014
9703557 Vector galois field multiply sum and accumulate instruction 0 2014
9424000 Instruction for performing a pseudorandom number seed operation 0 2014
9361108 Forming instruction groups based on decode time instruction optimization 2 2014
9600292 Common boot sequence for control utility able to be initialized in multiple architectures 0 2014
9594576 Architectural mode configuration 0 2014
9547523 Conditional instruction end operation 0 2014
9424035 Conditional transaction end instruction 0 2014
9619232 Predictive fetching and decoding for selected instructions 0 2014
9477468 Character data string match determination by loading registers at most up to memory block boundary and comparing to avoid unwarranted exception 0 2014
9335994 Convert from zoned format to decimal floating point format 0 2014
9335995 Convert to zoned format from decimal floating point format 0 2014
9740482 Vector generate mask instruction 0 2014
9727334 Vector exception code 0 2014
9436467 Vector floating point test data class immediate instruction 0 2014
* 9158711 Creating a program product or system for executing a perform frame management instruction 0 2014
9471311 Vector checksum instruction 4 2014
9122634 Use of test protection instruction in computing environments that support pageable guests 0 2014
9122477 Execution of a perform frame management function instruction 0 2014
9378128 Dynamic address translation with fetch protection in an emulated environment 0 2015
9411737 Clearing blocks of storage class memory 0 2015
9418006 Moving blocks of data between main memory and storage class memory 0 2015
9477417 Data returned responsive to executing a start subchannel instruction 0 2015
9262236 Warning track interruption facility 0 2015
9251085 Performing a clear operation absent host intervention 0 2015
9542260 Managing storage protection faults 0 2015
9690544 Round for reround mode in a decimal floating point instruction 0 2015
9354873 Performing a clear operation absent host intervention 0 2016
9811337 Transaction abort processing 0 2016
9678756 Forming instruction groups based on decode time instruction optimization 2 2016
9678757 Forming instruction groups based on decode time instruction optimization 2 2016
9747033 Configure storage class memory command 0 2016
9792125 Saving/restoring selected registers in transactional processing 0 2016
9606799 Performing a clear operation absent host intervention 0 2016
9740483 Vector checksum instruction 0 2016
9733938 Vector checksum instruction 0 2016
9778869 Managing storage protection faults 0 2017
 
SAP SE (2)
* 9063743 Model-based programming, configuration, and integration of networked embedded devices 0 2010
* 2012/0131,561 Model-based Programming, Configuration, and Integration of Networked Enbedded Devices 2 2010
 
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (10)
* 6629312 Programmatic synthesis of a machine description for retargeting a compiler 24 1999
* 6862565 Method and apparatus for validating cross-architecture ISA emulation 7 2000
* 6701518 System and method for enabling efficient processing of a program that includes assertion instructions 13 2000
* 2002/0066,081 Speculative caching scheme for fast emulation through statically predicted execution traces in a caching dynamic translator 40 2001
* 2002/0170,034 Method for debugging a dynamic program compiler, interpreter, or optimizer 4 2001
* 6553362 Case-reduced verification condition generation system and method using weakest precondition operator expressed using strongest postcondition operators 8 2001
* 2003/0033,593 Dynamic execution layer interface for explicitly or transparently executing application or system binaries 7 2001
* 2003/0101,439 System and method for supporting emulation of a computer system through dynamic code caching and transformation 33 2001
* 2005/0028,132 Application specific optimization of interpreters for embedded systems 11 2003
* 7051301 System and method for building a test case including a summary of instructions 2 2003
 
LUCENT TECHNOLOGIES INC. (1)
* 6862730 Register allocation in code translation between processors 10 2000
 
THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIS (1)
* 6681387 Method and apparatus for instruction execution hot spot detection and monitoring in a data processing unit 58 2000
 
GLOBALFOUNDRIES INC. (6)
9513924 Predictor data structure for use in pipelined processing 0 2013
9372695 Optimization of instruction groups across group boundaries 2 2013
9361144 Predictive fetching and decoding for selected return instructions 1 2013
9477474 Optimization of instruction groups across group boundaries 2 2013
9361146 Predictive fetching and decoding for selected return instructions 1 2014
9535703 Predictor data structure for use in pipelined processing 0 2014
 
FUJITSU LIMITED (1)
* 7039905 Compiler device and computer-readable recording medium recorded with compiler program 1 2000
 
SUN MICROSYSTEMS, INC. (2)
* 2004/0243,379 Ideal machine simulator with infinite resources to predict processor design performance 3 2003
* 2005/0028,148 Method for dynamic recompilation of a program 22 2003
 
MOTOROLA, INC. (1)
* 2007/0150,881 Method and system for run-time cache logging 98 2005
 
ATI Technologies SRL (1)
7069421 Side tables annotating an instruction stream 48 1999
 
UOP LLC (2)
* 7665070 Method and apparatus for a computing system using meta program representation 4 2004
* 2005/0240,897 Method and apparatus for a computing system using meta program representation 5 2004
 
INTEL CORPORATION (25)
* 6721943 Compile-time memory coalescing for dynamic arrays 18 2001
* 6948157 Interpreter for executing computer programs and method for collecting statistics 5 2001
* 2002/0066,091 Interpreter 0 2001
* 6880154 Alias-free test for dynamic array structures 8 2001
* 2003/0005,420 Alias-free test for dynamic array structures 2 2001
* 7194736 Dynamic division optimization for a just-in-time compiler 8 2002
* 2004/0117,778 Optimization of software code using N-bit pointer conversion 7 2002
* 7308682 Method and apparatus for recovering data values in dynamic runtime systems 2 2003
* 2004/0216,095 Method and apparatus for recovering data values in dynamic runtime systems 6 2003
* 7478374 Debug system having assembler correcting register allocation errors 5 2004
* 2005/0210,457 Debug system having assembler correcting register allocation errors 4 2004
* 7747992 Methods and apparatus for creating software basic block layouts 0 2004
* 2006/0041,875 Methods and apparatus for creating software basic block layouts 2 2004
* 7624384 Apparatus, system, and method of dynamic binary translation with translation reuse 12 2004
* 2006/0114,132 Apparatus, system, and method of dynamic binary translation with translation reuse 14 2004
* 2007/0006,189 Apparatus, system, and method of detecting modification in a self modifying code 9 2005
7703080 Interpreter for executing computer programs and method for collecting statistics 1 2005
9710387 Guest instruction to native instruction range based mapping using a conversion look aside buffer of a processor 0 2012
9697131 Variable caching structure for managing physical storage 0 2012
9639364 Guest to native block address mappings and management of native code storage 0 2012
* 9542187 Guest instruction block with near branching and far branching sequence construction to native instruction block 0 2012
9207960 Multilevel conversion table cache for translating guest instructions to native instructions 3 2012
* 2012/0198,209 GUEST INSTRUCTION BLOCK WITH NEAR BRANCHING AND FAR BRANCHING SEQUENCE CONSTRUCTION TO NATIVE INSTRUCTION BLOCK 3 2012
* 9495303 Fine grained address remapping for virtualization 0 2015
9753856 Variable caching structure for managing physical storage 0 2016
 
Semiconductor Energy Laboratory Co., Ltd. (1)
* 2011/0202,729 EXECUTING ATOMIC STORE DISJOINT INSTRUCTIONS 3 2010
 
TEXAS INSTRUMENTS INCORPORATED (3)
* 6728950 Method and apparatus for translating between source and target code 48 2001
* 7805708 Automatic tool to eliminate conflict cache misses 4 2006
* 2006/0259,691 Automatic Tool to Eliminate Conflict Cache Misses 7 2006
 
Amdahl Corporation (1)
* 2003/0093,774 State-specific variants of translated code under emulation 10 2001
 
NORTEL NETWORKS LIMITED (2)
6697961 Method and system for describing predicates in disjuncts in procedures for test coverage estimation 14 2000
6698012 Method and system for testing behavior of procedures 60 2000
 
STMICROELECTRONICS LIMITED (2)
* 8464235 Adaptive production of assembler 0 2010
* 2010/0115,498 ADAPTIVE PRODUCTION OF ASSEMBLER 0 2010
 
NOKIA CORPORATION (2)
* 7207038 Constructing control flows graphs of binary executable programs at post-link time 23 2003
* 2005/0060,696 Method and a system for constructing control flows graphs of binary executable programs at post-link time 5 2003
 
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (3)
* 6772106 Retargetable computer design system 20 1999
* 6851110 Optimizing an executable computer program having address-bridging code segments 8 2001
* 2002/0188,932 Optimizing an executable computer program having address-bridging code segments 2 2001
 
GOPRO, INC. (2)
* 8429625 Digital data processing method and system 1 2006
* 2009/0228,677 DIGITAL DATA PROCESSING METHOD AND SYSTEM 7 2006
 
XEROX CORPORATION (1)
* 6631517 Software constructs that facilitate partial evaluation of source code 8 2000
 
LINKEDIN CORPORATION (2)
* 7111287 Global processor resource assignment in an assembler 7 2003
* 2004/0139,427 Method and system for performing global processor resource assignment in an assembler 7 2003
 
AMAZON TECHNOLOGIES, INC. (3)
* 8832714 Automated service interface optimization 1 2013
9038094 Automated service interface optimization 0 2014
9419899 Automated service interface optimization 0 2015
 
SOCIONEXT INC. (2)
* 7784039 Compiler, compilation method, and compilation program 2 2005
* 2006/0064,682 Compiler, compilation method, and compilation program 8 2005
 
SONY INTERACTIVE ENTERTAINMENT INC. (18)
7813909 Register mapping in emulation of a target system on a host system 1 2007
* 7792666 Translation block invalidation prehints in emulation of a target system on a host system 5 2007
7770050 Method and apparatus for resolving clock management issues in emulation involving both interpreted and translated code 7 2007
* 2007/0277,052 METHOD AND APPARATUS FOR RESOLVING CLOCK MANAGEMENT ISSUES IN EMULATION INVOLVING BOTH INTERPRETED AND TRANSLATED CODE 11 2007
* 2007/0261,039 TRANSLATION BLOCK INVALIDATION PREHINTS IN EMULATION OF A TARGET SYSTEM ON A HOST SYSTEM 11 2007
* 7568189 Code translation and pipeline optimization 16 2007
* 2007/0261,038 Code Translation and Pipeline Optimization 15 2007
8060356 Processor emulation using fragment level translation 2 2008
* 8365151 Multiple stage program recompiler using information flow determination 0 2010
* 2010/0223,603 MULTIPLE STAGE PROGRAM RECOMPILER USING INFORMATION FLOW DETERMINATION 3 2010
8234514 Method and apparatus for resolving clock management issues in emulation involving both interpreted and translated code 1 2010
* 2010/0281,292 METHOD AND APPARATUS FOR RESOLVING CLOCK MANAGEMENT ISSUES IN EMULATION INVOLVING BOTH INTERPRETED AND TRANSLATED CODE 1 2010
8392171 Register mapping in emulation of a target system on a host system 0 2010
7957952 Translation block invalidation prehints in emulation of a target system on a host system 1 2010
* 2010/0305,935 REGISTER MAPPING IN EMULATION OF A TARGET SYSTEM ON A HOST SYSTEM 0 2010
8131535 Translation block invalidation prehints in emulation of a target system on a host system 0 2011
* 2011/0238,403 TRANSLATION BLOCK INVALIDATION PREHINTS IN EMULATION OF A TARGET SYSTEM ON A HOST SYSTEM 3 2011
8433555 Processor emulation using fragment level translation 1 2011
 
SEAGATE TECHNOLOGY LLC (2)
7124237 Virtual machine emulation in the memory space of a programmable processor 7 2003
* 2004/0123,290 Virtual machine emulation in the memory space of a programmable processor 3 2003
 
MICROSOFT TECHNOLOGY LICENSING, LLC (16)
* 6993751 Placing exception throwing instructions in compiled code 37 2001
* 2002/0169,999 Placing exception throwing instructions in compiled code 6 2001
* 7389501 System and method for register allocation using SSA construction 3 2003
* 7219329 Systems and methods providing lightweight runtime code generation 40 2003
* 7584455 Predicate-based test coverage and generation 87 2004
* 2007/0169,012 Asynchronous just-in-time compilation 3 2005
7614044 Attempting runtime retranslation of unresolvable code 7 2005
* 2006/0080,647 Attempting runtime retranslation of unresolvable code 7 2005
* 8615743 Adaptive compiled code 0 2006
* 2007/0240,120 Adaptive Compiled Code 5 2006
7890939 Partial methods 2 2007
* 2008/0196,014 PARTIAL METHODS 3 2007
8108868 Workflow execution plans through completion condition critical path analysis 2 2007
8949103 Program code simulator 0 2009
* 2010/0281,240 Program Code Simulator 2 2009
9032526 Emulating mixed-code programs using a virtual machine instance 0 2011
 
ANDES TECHNOLOGY CORPORATION (2)
* 7934073 Method for performing jump and translation state change at the same time 0 2007
* 2008/0229,054 METHOD FOR PERFORMING JUMP AND TRANSLATION STATE CHANGE AT THE SAME TIME 0 2007
 
GOOGLE TECHNOLOGY HOLDINGS LLC (5)
* 6732355 Method and device for generating registration data at compilation to enable trace of stack 6 2000
* 7100154 Dynamic compiler apparatus and method that stores and uses persistent execution statistics 8 2003
* 2004/0143,825 Dynamic compiler apparatus and method that stores and uses persistent execution statistics 2 2003
* 8387026 Compile-time feedback-directed optimizations using estimated edge profiles from hardware-event sampling 6 2008
8438558 System and method of updating programs and data 8 2009
 
SYNOPSYS, INC. (10)
* 7100164 Method and apparatus for converting a concurrent control flow graph into a sequential control flow graph 13 2000
* 8086438 Method and system for instruction-set architecture simulation using just in time compilation 5 2002
* 2003/0217,248 Method and system for instruction-set architecture simulation using just in time compilation 15 2002
8677312 Generation of compiler description from architecture description 9 2004
8689202 Scheduling of instructions 4 2005
9280326 Compiler retargeting based on instruction semantic models 0 2005
* 2007/0150,873 Dynamic host code generation from architecture description for fast simulation 1 2006
* 8554535 Instruction-set architecture simulation techniques using just in time compilation 1 2011
* 2012/0158,397 INSTRUCTION-SET ARCHITECTURE SIMULATION TECHNIQUES USING JUST IN TIME COMPILATION 1 2011
9383977 Generation of compiler description from architecture description 0 2014
 
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. (1)
* 6691306 Use of limited program space of general purpose processor for unlimited sequence of translated instructions 16 2000
 
QUALCOMM INCORPORATED (1)
9116685 Table call instruction for frequently called functions 0 2011
 
EMPIRE TECHNOLOGY DEVELOPMENT LLC (2)
* 9367292 Modulating dynamic optimizations of a computer program 0 2012
* 2013/0332,710 MODULATING DYNAMIC OPTIMAIZATIONS OF A COMPUTER PROGRAM 1 2012
 
VMWARE, INC. (1)
* 8521504 Method and apparatus for managing registers in a binary translator 2 2007
 
TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) (1)
* 2002/0010,913 Program profiling 8 2000
 
THOMSON LICENSING (1)
* 9442704 Control flow graph flattening device and method 0 2015
 
HONEYWELL INTERNATIONAL INC. (2)
* 7219328 Model-based composable code generation 37 2002
* 2004/0044,990 Model-based composable code generation 23 2002
 
THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK (4)
9069782 System and method for security and privacy aware virtual machine checkpointing 4 2013
9767284 Continuous run-time validation of program execution: a practical approach 0 2015
9552495 System and method for security and privacy aware virtual machine checkpointing 0 2015
9767271 System and method for validating program execution at run-time 0 2015
 
INTELLECTUAL VENTURES HOLDING 81 LLC (9)
* 7761857 Method for switching between interpretation and dynamic translation in a processor system based upon code sequence execution counts 6 1999
* 6714904 System for using rate of exception event generation during execution of translated instructions to control optimization of the translated instructions 16 1999
8413162 Multi-threading based on rollback 2 2005
* 7644210 Method and system for storing and retrieving a translation of target program instruction from a host processor using fast look-up of indirect branch destination in a dynamic translation system 17 2006
8019983 Setting a flag bit to defer event handling to a safe point in an instruction stream 3 2007
8418153 Method for integration of interpretation and translation in a microprocessor 0 2009
* 2010/0262,955 METHOD FOR INTEGRATION OF INTERPRETATION AND TRANSLATION IN A MICROPROCESSOR 36 2009
8438548 Consistency checking of source instruction to execute previously translated instructions between copy made upon occurrence of write operation to memory and current version 0 2011
8464033 Setting a flag bit to defer event handling to one of multiple safe points in an instruction stream 0 2011
 
THE BOEING COMPANY (2)
* 6966053 Architecture for automated analysis and design with read only structure 19 2001
* 2003/0033,038 Method and architecture for automated analysis and design 4 2001
 
INTELLECTUAL VENTURE FUNDING LLC (1)
7904891 Checking for instruction invariance to execute previously obtained translation code by comparing instruction to a copy stored when write operation to the memory portion occur 2 2008
 
SIEMENS INDUSTRY, INC. (1)
* 7856539 Method regarding a data log related to a programmable logic controller (PLC) 0 2007
 
FACEBOOK, INC. (2)
* 7356673 System and method including distributed instruction buffers for storing frequently executed instructions in predecoded form 7 2001
* 2002/0161,987 System and method including distributed instruction buffers holding a second instruction form 6 2001
 
WIND RIVER SYSTEMS, INC. (2)
* 8266605 Method and system for optimizing performance based on cache analysis 0 2006
* 2007/0240,117 Method and system for optimizing performance based on cache analysis 5 2006
 
UNISYS CORPORATION (5)
* 7058932 System, computer program product, and methods for emulation of computer programs 11 1999
* 7506321 Computer emulator employing direct execution of compiled functions 4 2002
* 8196120 Computer emulator employing direct execution of compiled functions 1 2008
* 9201635 Just-in-time dynamic translation for translation, compilation, and execution of non-native instructions 2 2013
* 2015/0277,861 JUST-IN-TIME DYNAMIC TRANSLATION FOR TRANSLATION, COMPILATION, AND EXECUTION OF NON-NATIVE INSTRUCTIONS 4 2013
 
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. (3)
* 6725450 Program conversion apparatus, processor, and record medium 9 2000
* 7134115 Apparatus, method, and program for breakpoint setting 15 2003
* 2003/0149,961 Apparatus, method, and program for breakpoint setting 56 2003
 
ELITE CREATIVE SOLUTIONS, LLC (1)
* 7099970 Apparatus and method to enhance a one-wire bus 15 2001
* Cited By Examiner