Importance

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Abstract

A multiport data communication system for switching data packets between ports includes a plurality of receive ports for receiving data packets, a plurality of transmit ports for transmitting data packets, circuitry deciding whether each received data packet is one of high priority and low priority, and a memory for storing each received data packet. A memory location designator is provided for each data packet indicating where the corresponding data packet is stored in the memory and a plurality of queuing devices corresponding to the plurality of transmit ports queue the memory location designators. Each queuing device has a high priority queue queuing memory location designators corresponding to data packets of high priority to be retrieved from the memory an transmitted by the respective transmit port and a low priority queue queuing memory location designators corresponding to data packets of low priority to be retrieved from the memory and transmitted by the respective transmit port. Transferring circuitry transfers the data packets from the memory to a transmit queue corresponding to each respective transmit port and includes logic circuitry corresponding to each transmit queue. The logic circuitry determines whether the low priority queue of a respective queuing device has a memory location designator for a data packet to be retrieved from the memory and sent to the corresponding transmit queue only when the high priority queue of the respective queuing device is empty of memory location designators.

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First Claim