Multithreaded, mixed hardware description languages logic simulation on engineering workstations
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Oct 15, 2002
Grant Date -
N/A
app pub date -
Jan 12, 1999
filing date -
Jan 12, 1999
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
This invention describes a multithread HDL logic simulator that is unique from the prior arts. Specifically, it can process both VHDL and Verilog languages in a single program, and it uses special concurrent algorithms to accelerate the tool's performance on multiprocessor platforms to achieve linear to super-linear scalability on multiprocessor systems. Furthermore, the invention includes a unique remote logic simulation and job scheduling capabilities.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully