Programmable logic device having embedded dual-port random access memory configurable as single-port memory
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United States of America Patent
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Oct 15, 2002
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N/A
app pub date -
Jul 29, 1998
filing date -
Jun 23, 1998
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Abstract
A programmable logic device has embedded random access memory ('RAM') that can function equally well in either single-port or dual-port operation. The RAM is dual-port RAM whose read address inputs and write address inputs are both connected to a conductor bus via two different sparsely populated programmable interconnection resources. The programmable interconnection resources are arranged so that each pair of corresponding read address and write address inputs can be connected to at least one conductor in common on the conductor bus, allowing the RAM to be configured to mimic a single-port RAM as read address signals and write address signals originating at remote components of the programmable logic device 'think' they are being directed to the same address inputs.
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