Mass storage error correction and detection system, method and article of manufacture
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United States of America Patent
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Oct 15, 2002
Grant Date -
N/A
app pub date -
Jun 25, 1999
filing date -
Jun 26, 1998
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Abstract
Data integrity is increased on mass-storage devices through a scheme whereby, a frame-based cyclic redundancy code (CRC) for each sector is recorded. A frame-based CRC is generated from the CRCs of the frames that compose a sector of data. In recording data, a CRC is generated from each frame, later, a master CRC is generated from the frame CRCs, then sector and master CRC are recorded on the mass-storage device medium. In retrieving data, the sector composed of frames and a master CRC are read, a plurality of CRCs are generated from each of the frames, a second master CRC is generated from the frame CRCs, and the master CRCs are compared to determine data integrity. In another embodiment, an input/output error detection and correction checksum (IOEDC), an error correction code (ECC) and a CRC are generated from a sector of data, and the IOEDC, ECC and CRC are stored on disc with the data sector.
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