Bank selector circuit for a simultaneous operation flash memory device with a flexible bank partition architecture
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United States of America Patent
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Oct 22, 2002
Issued Date -
N/A
app pub date -
Jun 26, 2001
filing date -
Sep 23, 1998
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A bank selector circuit for a simultaneous operation flash memory device with a flexible bank partition architecture comprises a memory boundary option, a bank selector encoder coupled to receive a memory partition indicator signal from the memory boundary option, and a bank selector decoder coupled to receive a bank selector code from the bank selector encoder. The decoder, upon receiving a memory address, outputs a bank selector output signal to point the memory address to either a lower memory bank or an upper memory bank in the simultaneous operation flash memory device, in dependence upon the selected memory partition boundary.
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