Low inductance four terminal capacitor lead frame
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Oct 29, 2002
Issued Date -
N/A
app pub date -
Mar 28, 2001
filing date -
Mar 16, 1999
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A chip capacitor is conductively coupled to spaced-apart (i.e., non-conductively coupled) circuit traces of an integrated circuit to provide a four terminal network. The chip capacitor includes a casing of dielectric material having first and second sets of electrode plates disposed therein, a first conductive lead frame which is conductively coupled to the first set of electrode plates, and a second conductive lead frame which is conductively coupled to the second set of electrode plates. The first and second lead frames are, in turn, conductively coupled to the circuit traces so as to route the output (or input) current of an electronic device through the capacitor.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully