Method and system for providing universal memory bus and module
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United States of America Patent
Stats
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Oct 29, 2002
Grant Date -
N/A
app pub date -
Oct 1, 1999
filing date -
Oct 1, 1999
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A memory card in accordance with the present invention allows a variety of memory devices to interface with a processor. The memory card comprises a data base which contains information about the variety of memory devices that are on the card and dual signal pairs that can be used to form different signal sets that are required to test or program the variety of memory devices. The memory card further comprises a plurality of reserved lines that can be used to form additional signal sets and a plurality memory areas. A memory card in accordance with the present invention comprises four different signal groups which allows memory modules that individually contain multiple memory types to be interfaced to a standard CPU. Such a memory bus is referred to as an X-Bus and the memory modules are referred to as X-Cards. The four signal groups of the X-Bus/X-Card combination are described below. 1. The X-Bus has a plurality of signals that connect to a device on the X-Card that contains information on all devices that exist on the X-Card. This device is referred to as the XDD (the X-Card Database Device). 2. The X-Bus also contains dual signal pairs that can be used to form different signal sets. These signal sets are required to test and or program typical memory devices such as FLASH programmable devices. 3. The X-Bus also provides a multiplicity of defined signals required to normally access most common memory types. One of these defined signals is a chip select signal (preferably #CS0), which is normally used to boot a computer system from reset. 4. Further, the X-Bus provides a multiplicity of reserved lines that can be used to form the different signal sets required for the testing, programming, and/or normal use modes of standard memory devices.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| INTERNATIONAL MICROSYSTEMS INC | 48834 KATO RD SUITE 105A FREMONT CA 94538 |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Schade, Peter A | Milpitas, CA | 8 | 106 |
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| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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