Programmable number of metal lines and effective metal width along critical paths in a programmable logic device
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United States of America Patent
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Nov 5, 2002
Grant Date -
N/A
app pub date -
Jun 28, 2000
filing date -
Jun 28, 2000
priority date (Note) -
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Abstract
A layout architecture for a programmable logic device comprising one or more adjacent metal lines, a first circuit, and a second circuit. The one or more adjacent metal lines may each comprise a critical path. The first circuit may be configured to present an input signal to each of the one or more adjacent metal lines in response to a configuration signal. The second circuit may be configured to (i) receive a signal from at least one of the one or more adjacent metal lines selected in response to the configuration signal and (ii) generate an output signal in response to the received signal.
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