Adjustable bandwidth phase locked loop with fast settling time
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United States of America Patent
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Nov 5, 2002
Grant Date -
N/A
app pub date -
Aug 11, 1998
filing date -
Aug 11, 1998
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An adjustable bandwidth phase-locked loop including a phase-locked loop having a first input node receiving an input signal having a first frequency, a second input node receiving a feedback signal and an output node which has a signal indicative of an error signal characterizing a frequency error between the input signal and the feedback signal. The adjustable bandwidth phase-locked loop includes a voltage controlled oscillator, coupled to the second input node, receiving the error signal and generating the feedback signal where the feedback signal has a frequency which tracks the first frequency. The adjustable bandwidth phase-locked loop includes a variable loop filter, coupled between the phase-locked loop and the voltage controlled oscillator, filtering the error signal. The variable loop filter is configurable to allow for the tracking of the input signal over both of a broad bandwidth and a narrow bandwidth.
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