Importance

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Abstract

A self-configurable, adaptable and programmable (hereinafter 'CAP') I/O bus (15) is provided in a digital computer (11) to establish compatibility between the input/output bus of computer (11) and an incompatible input/output bus of an external module (12). Computer (11) includes a field programmable gate array (FPGA) (31) for translating the bus configuration used by module (12) to that employed by computer (11). Two preselected CAP I/O Bus conductors (17, 18) pass an identification number from the module (12) to computer (11) that points to the location of the information necessary to compatibly configure FPGA (31). This information, which includes a bus logic FPGA image file and a device driver, and may include a protocol driver, may be found in one of several locations, including onboard computer (11) in memory, onboard module (12), or at an external site such as a server (28) accessible via the Internet. Computer (11) retrieves the configuration information from the location corresponding to the identification number, configures FPGA (31) and establishes communication between the two input/output buses.

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First Claim