Floating-point and integer multiply-add and multiply-accumulate

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United States of America Patent

PATENT NO 6480872
SERIAL NO

09235148

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Abstract

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A method and a device including, in one embodiment, a multiply array and at least one adder to perform a floating-point multiplication followed by an addition when operands are in floating-point format. The device is also configured to perform an integer multiplication followed by an accumulation when operands are in integer format. The device is further configured to perform a floating-point multiply-add or an integer multiply-accumulation in response to control signals. In another embodiment, the device contains an adder and the adder is capable of performing a floating-point addition and an integer accumulation. The adder is configured to be extra wide to reduce operand misalignment. Moreover, the device stalls the process in response to operand misalignment.

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Patent Owner(s)

Patent OwnerAddress
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE LTDSINGAPORE SINGAPORE SINGAPORE CITY SINGAPORE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Choquette, Jack H Los Altos, CA 58 553

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