High speed TCP/IP stack in silicon
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United States of America Patent
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Nov 19, 2002
Grant Date -
N/A
app pub date -
Jun 25, 2001
filing date -
Jun 25, 2001
priority date (Note) -
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Abstract
A circuit for converting data between communication protocols at different levels of a protocol stack. The circuit generally comprises a first processor and a second processor. The first processor may be configured to convert the data between a first communication protocol and a second communication protocol. The first processor may have a plurality of first rows each having at least one first block each configured to process a portion of the data. At least one of the first rows may have a plurality of the first blocks. The second processor may be configured to convert the data between the second communication protocol and a third communication protocol. The second processor may have a plurality of second rows each having at least one second block each configured to process a portion of the data. At least one of the second rows may have a plurality of the second blocks.
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