SINGULATION METHOD USED IN LEADLESS PACKAGING PROCESS
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United States of America Patent
Stats
-
Dec 3, 2002
Grant Date -
Dec 26, 2002
app pub date -
Aug 14, 2001
filing date -
Jun 21, 2001
priority date (Note) -
Granted
status (Latency Note)
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Abstract
A singulation method comprising: (a) providing a molded product including semiconductor chips attached and electrically coupled to an upper surface of a lead frame wherein a lower surface of the lead frame is exposed from the bottom of the molded product, the lead frame including a plurality of units in an array arrangement and cutting streets between the units, each unit having a die pad and leads arranged at the periphery of the die pad, a first metal layer formed on the entire lower surface of the lead frame except the cutting streets; (b) etching the lower surface of the lead frame with the first metal layer as mask such that the cutting streets are etched away to form a plurality of grooves; and (c) cutting the etched molded product along the grooves to obtain the leadless semiconductor packages.
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