Process for the selective formation of salicide on active areas of MOS devices
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United States of America Patent
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Dec 10, 2002
Grant Date -
N/A
app pub date -
May 12, 1998
filing date -
May 13, 1997
priority date (Note) -
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Abstract
Process for forming salicide on active areas of MOS transistors, each MOS transistor comprising a gate and respective source and drain regions, the source and drain regions each comprising a first lightly doped sub-region adjacent the gate and a second highly doped sub-region spaced apart from the gate. The salicide is formed selectively at least over the second highly doped sub-regions of the source and drain regions of the MOS transistors, and not over the first lightly doped sub-region.
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