Critical dimension control improvement method for step and scan photolithography

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United States of America Patent

PATENT NO 6493063
SERIAL NO

09344294

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Abstract

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The invention provides a method and apparatus for reducing the variance of critical dimensions in a semiconductor device, by providing a method and apparatus for measuring lens and reticle error and then providing a method and apparatus for compensating for the error. The critical dimension of a die is measured and used to create a critical dimension function CD(x,y), where y is the direction of scan and x is perpendicular to the direction of scan, for a stepper scanner. CD(x,y) is used to determine the energy distribution E(x,y). E(x,y) is separated into orthogonal functions E(x) and E(y). Changes in the exposure energy or Gray filters or other means are used to compensate for the changes in E(x) and E(y).

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Patent Owner(s)

  • GLOBALFOUNDRIES INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Minvielle, Anna Maria San Jose, CA 1 8
Seltmann, Rolf Am Stockteich, DE 14 214

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