Nonvolatile semiconductor memory device

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United States of America Patent

PATENT NO 6493265
SERIAL NO

10114960

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Abstract

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A method of determining multi-bit data in a multi-level memory. The method includes setting a source potential of a memory cell to a first source potential, setting a gate potential thereof to a first read-out potential, and determining if bit data of a first digit of multi-bit data is '0' or '1'. Also, the method includes setting the source potential of the memory cell to the first source potential and setting the gate potential thereof to a second read-out potential that is different from the first read-out potential when the bit data of the first digit is '0', and determining if bit data of a second digit of the multi-bit data is '0' or '1'. In addition the method includes setting the source potential of the memory cell to a second source potential different from the first source potential and setting the gate potential thereof to the second read-out potential when the bit data of the first digit is '1', and determining if bit data of the second digit of the multi-bit data is '0' or '1'.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBAMINATO-KU TOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Arai, Fumitaka Yokohama, JP 238 5483
Satoh, Shinji Yokohama, JP 31 1096
Shirota, Riichiro Fujisawa, JP 208 7211

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