Optimization processing for integrated circuit physical design automation system using optimally switched fitness improvement algorithms

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United States of America Patent

PATENT NO 6493658
SERIAL NO

08229616

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Abstract

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A physical design automation system produces an optimal placement of microelectronic components or cells on an integrate circuit chip. An initial population of possible cell placements is generated, and repeatedly altered using simulated on or other fitness improvement algorithm to progressively increase the fitnesses (decrease the costs) of the placements. After each alteration step, the fitnesses of the placements are calculated, and less fit placements are discarded in favor of more fit placements. After a termination criterion is reached, the placement having the highest fitness is designated as the optimal placement. Two or more fitness improvement algorithms are available, and are optimally switched from one to the other in accordance with an optimization criterion to maximize convergence of the placements toward the optimal configuration.

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Patent Owner(s)

Patent OwnerAddress
BELL SEMICONDUCTOR LLC401 N MICHIGAN AVE SUITE 1600 CHICAGO IL 60611

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Boyle, Douglas B Palo Alto, CA 39 2285
Jones, Edwin R Sunnyvale, CA 35 2538
Koford, James S San Jose, CA 78 4551
Rostoker, Michael D Boulder Creek, CA 204 14387
Scepanovic, Ranko Cupertino, CA 165 5904

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