US Patent No: 6,493,784

Number of patents in Portfolio can not be more than 2000

Communication device, multiple bus control device and LSI for controlling multiple bus

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Abstract

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The present invention provides a multiple bus control device and others which can also be applied to access control by a signal having a directional propagation property for implementing various communication between/among modules. Each of plural modules makes a request for communication to a multiple bus control device by sending communication request information for specifying one or more communication partner modules to the multiple bus control device. The multiple bus control device checks an idle state of a module to be communicated and an idle channel in a multiple bus based upon received communication request information and permits communication between a module which sends communication request information using the idle channel and a communication partner module specified in the communication request information.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
FUJI XEROX CO., LTD.TOKYO7987

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fujimagari, Hiroshi Nakai-machi, JP 17 187
Funada, Masao Kanagawa, JP 45 447
Kamimura, Takeshi Kanagawa, JP 44 181
Kobayashi, Kenichi Tokyo, JP 268 1678
Ozeki, Shinobu Kanagawa, JP 45 182
Sakai, Kazuhiro Fuji, JP 108 567

Cited Art Landscape

Patent Info (Count) # Cites Year
 
FACEBOOK, INC. (1)
6,049,841 Method and apparatus of selecting data transmission channels 9 1998
 
HITACHI, LTD. (1)
5,717,852 Multiple bus control method and a system thereof 6 1996
 
NEC CORPORATION (1)
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NXP B.V. (1)
5,872,937 System for optimizing bus arbitration latency and method therefor 6 1997
 
RAYTHEON COMPANY (1)
5,936,953 Multi-mode, multi-channel communication bus 94 1997
 
RIVERSTONE NETWORKS, INC. (1)
6,185,221 Method and apparatus for fair and efficient scheduling of variable-size data packets in an input-buffered multipoint switch 88 1998
 
XEROX CORPORATION (1)
5,195,089 Apparatus and method for a synchronous, high speed, packet-switched bus 62 1990

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
MICRON TECHNOLOGY, INC. (16)
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7,366,864 Memory hub architecture having programmable lane widths 1 2004
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7,805,586 System and method for optimizing interconnections of memory devices in a multichip module 2 2006
7,596,641 System and method for transmitting data packets in a computer system having a memory hub architecture 1 2006
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8,015,384 Memory hub architecture having programmable lane widths 1 2009
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8,190,819 System and method for optimizing interconnections of memory devices in a multichip module 0 2010
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8,346,998 System and method for transmitting data packets in a computer system having a memory hub architecture 0 2011
 
ROUND ROCK RESEARCH, LLC (8)
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EMC CORPORATION (1)
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FREESCALE SEMICONDUCTOR, INC. (1)
7,865,897 Selective transaction request processing at an interconnect during a lockout 0 2006
 
FUJI XEROX CO., LTD. (1)
6,651,139 Multiprocessor system 55 2000
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (1)
7,809,874 Method for resource sharing in a multiple pipeline environment 0 2006
 
NEC CORPORATION (1)
8,683,106 Control apparatus for fast inter processing unit data exchange in an architecture with processing units of different bandwidth connection to a pipelined ring bus 0 2008
 
Pro Design Electronics GmbH (1)
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SAMSUNG ELECTRONICS CO., LTD. (1)
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11.5 Year Payment $7400.00 $3700.00 $1850.00 Jun 10, 2014
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