Data bus bandwidth allocation apparatus and method

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United States of America Patent

PATENT NO 6499072
SERIAL NO

09388975

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Abstract

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A data bus bandwidth allocation apparatus and method uses buffer entry feedback data from a buffer, such as an overflow buffer, that receives requested data over an unregulated bus. The data bus bandwidth allocation method and apparatus generates data issue delay data based on the buffer entry feedback data to adjust data commands to a data source, such as frame buffer memory used to feed a regulated bus. In one embodiment, the data issue rate regulator utilizes a programmable threshold corresponding to a threshold of data entries in an overflow. The overflow FIFO has feedback indicating, for example, the number of free entries or the number of full entries. The data issue rate regulator provides data rate regulation information to an adjustable delay sequencer. The adjustable delay sequencer selectively sequences data reads from the frame buffer memory so that data collisions do not occur over the memory read backbone.

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Patent Owner(s)

  • ATI TECHNOLOGIES ULC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Frank, Michael Newtown, PA 241 2753
Wiseman, John Raymond Newtown, PA 1 12

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